Allwinner T527

Octa-core 64-bit artificial intelligence platform processor

Overview

Allwinner T527 is a high-performance octa-core Cortex-A55 Al platform SoC for electronic commercial and industrial fields. It integrates Cortex-A55 octa-core CPU, 2 Tops NPU, G57 MC1 GPU, 32-bit DDR3/DDR4/LPDDR3/LPDDR4/LPDDR4X DRAM, multi video output interfaces (2xRGB/2xDual-LVDS/2xMIPI­ DSI/HDMl/eDP), and video input interfaces (MIPI CSI). It supports 4K@60fps H.265 decoder, 1080p@60fps H.264 encoder, DI, SmartColor system, providing smooth user experience and professional Al visual effect. Allwinner T527 can be used in content sharing and self-service interactive terminals, smart manufacturing, and other electronic commercial and industrial devices.

Highlights

Integrate 8xA55 CPU, G57 MP1 GPU, and 4GB DDR3/DDR4/LPDDR3/LPDDR4/LPDDR4X, providing smooth user experience and professional AI visual effect

Support full format video playback, 4K@60fps H.265 video decoder, and 4K@25fps H.264 video encoder

Support multi video output interfaces such as RGB888, MIPI-DSI, dual link LVDS, HDMI, eDP, to achieve different display in dual screen

Integrated MIPI CSI supporting maximum 4-ch HD camera inputs to achieve differentiated visual functions

Block diagram

 

Specifications

 

Processor

Octa-core ARM Cortex-A55

RISC-V CPU, up to 200 MHz

ARM G57 MC01 GPU

HiFi4 DSP

2 Tops NPU

 

Memory

32-bit DDR3/DDR3L/DDR4/LPDDR3/LPDDR4/LPDDR4X interface, supporting maximum capacity of 4GB

SDIO3.0/eMMC5.1 interface

8-bit NAND flash interface with maximum 80-bit/1KB ECC

 

Video decoder

H.265 MP decoder up to 4K@60fps

H.264 BL/MP/HP decoder up to 4K@30fps

VP9 decoder up to 4K@60fps

Multi-format 1080p@60fps video playback, including VP8, MPEG1/2 SP/MP, MPEG4 SP/ASP, AVS+/AVS JIZHUN, VC1 SP/MP

 

Video encoder

H.264 encoder up to 1080p@60fps

MJPEG encoder up to 4K@15fps

JPEG encoder up to 8K x 8K resolution

 

Video input

2 × 4-lane or 4 x 2-lane MIPI CSI, up to 2 Gbps per lane in HS transmission, compliant with MIPI-CSI2 V1.2 and MIPI DPHY V1.2

⁠Maximum video capture resolution of 8M@30fps

Support formats YUV422, YUV420, RAW-8, RAW-10, RAW-12, RAW-14, and RAW-16

⁠Support DVP protocol

 

Video output

⁠HDMI 2.0a up to 4K@60fps

2 x 4-lane MIPI-DSI output, supporting up to 2.5K@60fps

2 x LVDS interface with dual link, up to 1080p@60fps

2 x RGB interfaces with DE/SYNC mode, up to 1080p@60fps

eDP1.3 up to 2.5K@60fps

 

Audio

2 DACs and 3 ADCS

2 x audio outputs: LINEOUTLP/N, LINEOUTRP/N, HPOUTL/R

3 x audio inputs: MICIN1P/N, MICIN2P/N, MICIN3P/N

I2S mode supports 8 channels, and 32-bit/192kbit sample rate

I2S and TDM modes support maximum 16 channels, and 32-bit/96kbit sample rate

 

Security engine

Support Full Disk Encryption

AES, DES, 3DES, XTS, and SM4 encryption and decryption algorithms

MD5, SHA, and HMAC tamper proofing

RSA, ECC signature and verification algorithms

Support 160-bit hardware pseudo random number generator (PRNG) with 175-bit seed

Support 256-bit hardware true random number generator (TRNG)

Integrated 2K-bit EFUSE for chip ID and security application

 

Connectivity

1 x USB2.0 Host, 1 x USB2.0 DRD, 1 x USB3.1 DRD

2 x GMAC (10/100/1000 Mbps port with RGMII and RMII interfaces)

2 x CIR RX, 1 x CIR TX, 9 x TWI, 4 x SPI, 10 x UART, 2 x CAN

30-ch PWM, 24-ch GPADC, 2-ch LRADC

SDIO 3.0, LEDC

 

PMIC

Companion Allwinner Power Management IC

 

Package

TFBGA 664balls

17 mm x 17 mm size, 0.5 mm ball pitch, 0.3 mm ball size

 

Process

22nm HPC

 

Application diagram