Allwinner T153

Overview

Allwinner T153 is a quad-core architecture solution targeted for automation applications, such as programmable logic controllers (PLCs) and human-machine interface (HMI).

Excellent compute capacity

Equipped with quad-core ARM Cortex-A7 and single-core RISC-V E907, with support for DDR3/DDR3L/DDR4 memory, Allwinner T153 delivers powerful compute performance and fast response, making it ideal for demanding automation tasks.

Intelligent automation control

Allwinner T153 features three Gigabit Ethernet interfaces, two CAN_FD interfaces, and 16-/32-bit local bus, supporting high-throughput networking for complex data-driven use cases. Its integrated image signal processor and display engine enable clear real-time visual feedback for managing intricate manufacturing processes.

Rich expansion options

With extensive peripheral support, Allwinner T153 offers 16-channel GPADC, 5 TWIs, and 22-channel PWM. These interfaces provide flexibility for diverse applications, enabling easy integration and scalability in automation systems.

Block diagram

Specifications

Processor

Quad-core Cortex™-A7

L1 32 KB I/D-cache per core + L2 512 KB

Single-core RISC-V E907

16 KB I-cache + 16 KB D-cache

Memory & Storage

16-bit DDR3/DDR3L/DDR4

160 KB SRAM

SD 2.0/3.0, eMMC 5.0/5.1, SPI Flash

ISP

Support up to 2-channel TDM

Maximum frame rate: 1M@30fps online, 2M@30fps offline

Display engine

DE, up to 1080P VI/UI layer size

G2D, supporting mixer/rotate 1080P@120fps

Video output

1x RGB, up to 1920x1200@60fps

1x dual-link LVDS, up to 1920x1080@60fps

1x 4-lane MIPI DSI output, up to 1920x1200@60fps and 1.0 Gbit/s per lane

Video input

Parallel CSI interface

- 8/10/12/16-bit width

- BT.656, BT.601, BT.1120, and Digital Camera (DC) protocol

- BT.656 up to 2x720P@30fps and BT.1120 up to 2x1080P@30fps

MIPI CSI interface

- 4-lane/2+2-lane MIPI CSI, up to 1.0 Gbit/s per lane

Audio

1 x DAC

1 x audio output: LINEOUT

2 x I2S

1 x 8-channel DMIC, up to 8 KHz-48 KHz sampling rate

1 x OWA OUT

Security engine

AES/DES/3DES/SM4 symmetrical algorithm

MD5/SHA/HMAC/SM3 hash algorithm

RSA/ECC/SM2 public key algorithm

PRNG/TRNG random bit generate algorithm

Support secure boot

Support secure memory isolation

Automation connectivity

3 x RMII/RGMII

2 x CAN_FD

1 x 16-/32-bit Local Bus

General connectivity

1 x USB2.0 DRD

1 x USB2.0 Host

1 x SDIO 3.0

22-channel PWM (multiplex with 16-channel PWMCS OUT & 14-channel PWMCS IN)

3 x SPI

10 x UART

5 x TWI

16-channel GPADC

4-channel TPADC

1 x LEDC

4 x IR_RX

1 x IR_TX

Package

eQFP128, 14 mm x 14 mm

Process

22nm ULP

Quad-core high-performance automation processor