Allwinner R329

Dual-core intelligence voice interaction processor

Overview

With the cost-effective dual-core Cortex-A53 CPU, dual-core HIFI4, and 0.25T NPU accelerator, Allwinner R329 provides powerful, energy-efficient computing power for audio applications, supporting mainstream voice pick and play solutions. Allwinner R329 integrates with five ADC channels and two DAC channels for direct use in four-microphone mono or triple-microphone stereo speaker. It also integrates with eight PDM channels and 16 I2S channels for richer microphone arrays and speaker output solutions. The outstanding audio engine supports all major high-resolution audio formats and works seamlessly with the CPU to accelerate multimedia algorithms and improve the user experience. Allwinner R329 is the ideal SoC for the smart speaker and smart home markets.

Highlights

High integration

Allwinner R329 integrates powerful processor, 128MB DDR3, and high performance 5 ADC, 2 DAC, 3 I2S, 8 DMIC, 2 LDOs, together providing efficient voice interaction solutions.

High performance

Dual-core Cortex-A53 CPU up to 1.5GHz, dual-core HiFi4 DSP up to 400MHz, ARM Zhouyi Z1 AIPU 0.25T, providing powerful computing power. Audio DACs with 100dB SNR@A-weight and -85dB THD+N, enabling superior sound quality.

Low power design

Advanced 28nm process design with lower voltage, lower leakage, power optimisation, enhanced heat dissipation package, and improved heating experience. NR, AEC, and keyword recognition can be run in HiFi4 DSP, with wake-up standby power consumption of less than 50mW.

Quality assurance

Quality assurance encompasses components engineered to withstand industrial-level working temperatures, guaranteeing longevity, coupled with a chip lifespan of 10 years to ensure sustained performance and reliability.

Block diagram

 

Specifications

 

CPU

Dual-core ARM Cortex-A53@1.5GHz

32KB L1 I-cache + 32KB L1 D-cache per core

256KB L2 cache

 

DSP

Dual-core HiFi4@400MHz

32KB L1 I-cache + 32KB L1 D-cache per core

2MB SRAM

 

NPU

Arm China Zhouyi Z1 AIPU, 1TEC+128mac FF

0.25TOPS@800MHz

 

Memory

Embedded DDR3 128MB

Support SPI Nand/Nor/eMMC

 

Audio

Support 5 audio ADC and 2 audio DAC

Support 5 analog audio inputs and 2 analog audio output

Up to 3 I2S/PCM controllers for Bluetooth and external audio codec

Integrated digital microphone, supporting maximum 8 digital microphones

 

Security

Support symmetrical algorithm including AES, DES, 3DES

Support hash algorithm including MD5, SHA, HMAC

Support pubic key algorithm RSA

Support 160-bit hardware PRNG with 175-bit seed

Support 256-bit hardware TRNG

Support 1K-bit EFUSE for chip ID and security application

 

Connectivity

USB 2.0 OTG x 1

USB HOST x 1

SDIO 3.0 x 2

LEDC, PWM x 15

IR TX, IR RX

TWI x 3, SPI x 2, UART x 5 • LRADC , GPADC x 4

GMAC, SCR

 

Wifi and Bluetooth

XR829 or others

 

OS

Linux 4.9

 

Package

BGA231 12mm x 12mm

 

Process

28nm HPC+

 

Application diagram